In the field of manufacturing process control, various types of field devices having communication functions (for example, sensors, valves, and the like) are installed in the plants, to control the various manufacturing processes in the plants through reading into a system signals that are transmitted from the field devices. As systems that control manufacturing processes there are those that control, for example, the degree of opening of valves based on flow rates, temperatures, pressures, and the like, read in from sensors. In recent years, devices equipped with HART (Highway Addressable Remote Transducer) communication functions have been used as field devices connected to this type of process control system. HART communication-compatible devices perform input and output of signals (hereinafter termed “HART communication signals”) that are produced by superimposing digital signals, which have been converted into frequency signals of 1200 Hz or 2200 Hz, onto DC signals of between 4 and 20 mA, that indicate the measured values or control values. That is, HART communication-compatible devices are able to apply and exchange various types of information, in addition to measured values and control values. Systems that use HART communication-compatible devices are disclosed in Japanese Unexamined Patent Application Publication 2003-186503 (“JP '503”) in Japanese Patent 4129715 (“JP '715”), below.
In the systems in each of the aforementioned JP '503, and JP '715, HART communications signals that are outputted from a plurality of HART communications-compatible devices are selected sequentially by a multiplexer and sent to higher-level devices. HART communications require some time for each individual communication, when the communications are performed sequentially using a multiplexer, because the communication typically is performed at the low speed of 1200 bps. This produces processing delay in HART communications, producing delays in the systems.
The present invention was created in order to solve the problems in the conventional technology described above, and the object thereof is to provide an input/output device, having HART communications functions, able to eliminate the processing delay through HART communications, in order to reduce system lag.
An input/output device having HART communications functions according to the present invention includes channels that are allocated to each input/output destination of HART communications signals that are produced through superimposing a second signal onto a first signal; a controlling portion for controlling communications performed with a higher-level device; and a HART communications portion, provided for each channel, for extracting the second signal from the HART communications signal received through the channel, and sending, to the controlling portion, a digital signal corresponding to the second signal, wherein the controlling portion sends the digital signals, sent by the individual HART communications portions, to the higher-level device.
The use of this structure makes it possible to process, in individual HART communications portions that are provided for each of the channels, the HART communication signals that are sent from, for example, various types of field devices, and then to send the signal after processing to a higher-level device through the controlling portion. Doing so makes it possible to perform, simultaneously and in parallel for each of the channels, the processes in the HART communications portions that require processing time.
The controlling portion, when a request signal has been received from the higher-level device, may send the request signal to the HART communications portion corresponding to the request signal, and the HART communications portion may send, through the channel, a HART communication signal that includes the request signal to a lower-level device that is the input/output destination.
The HART communications portion may include a separating/superimposing portion for separating the HART communications signal into the first signal and the second signal, or for superimposing the second signal onto the first signal to produce the HART communications signal; a modulating/demodulating portion for performing conversion processes on the second signal and the digital signal; and a second controlling portion for controlling the transmission and reception of the digital signal that is performed between the modulating/demodulating portion and the controlling portion.
The first signal may be a 4-20 mA DC signal; and the second signal may be a frequency signal wherein a digital signal has been converted.
The present invention enables the provision of an input/output device having HART communications functions, able to eliminate the processing delay through HART communications, in order to reduce system lag.